The invention relates to the general field of magnetic random access memory with particular reference to magneto-resistance (MR) based devices, including both Giant magneto-resistance type (GMR) and tunnel magneto-resistance type (TMR) devices.
The principle governing the operation of the memory cells in magnetic RAMs is the change of resistivity of certain materials in the presence of a magnetic field (magneto-resistance). Magneto-resistance can be significantly increased by means of a structure known as a spin valve. The resulting increase (known as Giant Magneto-Resistance or GMR) derives from the fact that electrons in a magnetized solid are subject to significantly less scattering by the lattice when their own magnetization vectors (due to spin) are parallel (as opposed to anti-parallel) to the direction of magnetization of their environment.
The key elements of a spin valve can be seen in FIG. 6 which shows an example of a memory element. Seen are low coercivity (free) ferromagnetic layer 61, non-magnetic spacer layer 64, and a high coercivity ferromagnetic layer. The latter is usually formed out of soft ferromagnetic layer 65 that is pinned magnetically by an associated antiferromagnetic layer 66. When the free layer is exposed to an external magnetic field, the direction of its magnetization 63 is free to rotate according to the direction of the external field. After the external field is removed, the magnetization of the free layer will stay at a direction, which is dictated by the minimum energy state, determined by the crystalline and shape anisotropy, coupling field and demagnetization field. If the magnetization direction of the pinned layer is parallel to the free layer, electrons passing between the free and pinned layers, suffer less scattering. Thus, the resistance at this state is lower, when current flows along the film plain between terminals 62. If, however, the magnetization of the pinned layer is anti-parallel to the free layer, electrons passing from one layer into the other will suffer more scattering so the resistance of the structure will increase. The change in resistance of spin valve is typically 8-15%.
The simple sandwich structure of ferromagnetic layer-thin conductor-ferromagnetic layer can be used as memory element. In this structure, there is no anti-ferromagnetic layer, thus, neither of the two ferromagnetic layers is pinned. This kind of memory cell is called pseudo-spin valve memory cell. Both are free to switch magnetization under external field. One of the ferromagnetic layers is thicker than the other, the thicker one switches magnetization direction at a higher external magnetic field.
Of more recent vintage is the magnetic tunneling junction (MTJ) in which the layer that separates the free and pinned layers is a non-magnetic insulator, such as alumina or silica. Its thickness needs to be such that it will transmit a significant tunneling current. The principle governing the operation of the MTJ cell in magnetic RAMs is the change of resistivity of the tunnel junction between two ferromagnetic layers. When the magnetization of the two ferromagnetic layers is in opposite directions, the tunneling resistance increases due to a reduction in the tunneling probability. The change of resistance is typically 40%, which is much larger than for GMR devices. This phenomenon is called tunnel magneto-resistance effect, or TMR.
In a conventional 1T1R (1 transistor, 1 resistor), R can be the spin valve stripe or the tunnel diode of the MTJ device) magnetic RAM cells are programmed using two programming currents flowing through two orthogonal lines. This is illustrated in FIG. 1 where programming lines 11 and bit lines 12 intersect above memory cell 13 (the offset seen for lines 12 is for purposes of making the drawing clearer). The applied magnetic field is in the longitudinal direction of the cell, due to lines 11, which is usually the magnetic anisotropy axis, but is below the switching threshold of the cells. Thus, the longitudinal field alone does not switch the cells. The transverse field generated by lines 12 lowers the switching threshold of the longitudinal field so that a cell that lies at the intersection of two orthogonal activated lines can switch, while half-selected cells on same bit or programming line do not.
One weakness of this programming scheme is that the workable programming current values are bounded by a window, which is determined by the tolerance of the switching field of the cell array. When the spread of the threshold of cells in the array is large enough, half-selected cells will be disturbed. There is thus a need for an approach in which the programming magnetic field can be applied to only one cell without half-selecting other cells within the array.
Once a cell has been magnetized in a given direction, representing a zero or a one, it can be interrogated by applying voltage to one of the word lines 14 together with one of the bit lines 12. While all the FETs (such as 15) whose gates connect to the selected word line 14 will be activated, only the one that connects to selected bit line 12 will send current through memory element 13. Due to the MR effect, the measured resistance of 13 will correlate with its direction of magnetization.
A routine search of the prior art was performed with the following references of interest being found:
In U.S. Pat. No. 6,272,040 B1, Salter et al. show a method for programming a MR memory device while Naji discloses a MTJ MRAM parallel architecture in U.S. Pat. No. 6,272,041 B1. A ferroelectric memory device is described by Skata et al. in U.S. Pat. No. 6,097,623. U.S. Pat. No. 6,269,018 B1 (Monsma et al.) shows a MRAM using current through a MTJ write mechanism and in U.S. Pat. No. 6,180,444 B1, Gates et al. disclose a MJT memory device. The following publications are also noted:
(1) xe2x80x9cSpin-valve RAM cell,xe2x80x9d by D. D. Tang, et al, IEEE Trans. on Magn., vol. 31, p3206, 1995.
(2) xe2x80x9cRecent developments in magnetic tunnel junction MRAM,xe2x80x9d Tehrani, S. et, al., IEEE Trans. on Magn., vol. 36, Issue: 5 Part: 1, p.2752, September 2000.
It has been an object of at least one embodiment of the present invention to provide a MR based magnetic RAM that is free of the disturb problem that can occur in neighboring half-selected cells.
Another object of at least one embodiment of the present invention has been that said RAM permit a strong write current to ensure that cells do not show minor loop behavior.
Still another object of at least one embodiment of the present invention has been that the programming wires used in said RAM be in direct contact with the memory cells making up said RAM, thereby minimizing the current required during data writing.
A further object of at least one embodiment of the present invention has been to provide a method for writing information into and reading information from said RAM.
These objects have been achieved by using two bit lines instead of the single bit line seen in the prior art. One end of the memory cell is connected to a first bit line, in a similar manner to the prior art. The programming line does not extend across the full width of the array, being instead connected to a second bit line after passing directly across a memory cell. Orthogonal to the two bit lines is a word line whose role is to activate/deactivate transistors associated with the selected cell. Both 1T1R and 2T1R versions of the invention are described. The invention is applicable to both pseudo spin valves and magnetic tunneling junctions.